Semiconductor Engineering

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. “Transport triggered architectures ...
CRN

Qualcomm Acquires RISC-V Chip Designer Ventana To Boost CPU Efforts

Qualcomm said Wednesday that it has acquired Ventana Micro Systems, a startup that was focused on developing server CPU ...
inc42

What Is Chip Architecture? Here’s All You Need to Know

In semiconductors, architecture refers to the instruction set architecture (ISA), a detailed set of rules and specifications governing how a chip processes data and executes instructions. This ISA ...
TechSpot

Intel proposes the x86-S architecture for a simpler, more efficient CPU instruction set

Forward-looking: After being beaten by AMD in introducing the first, truly 64-bit instruction set in the x86 CPU world, Intel is now trying to get ahead of its historical competitor by working on a ...
DIGITIMES

Qualcomm acquires Ventana Micro Systems to strengthen RISC-V CPU capabilities

Qualcomm has acquired Ventana Micro Systems Inc., a move aimed at bolstering its capabilities in the RISC-V instruction set ...
Electronic Design

RISC-V Serves Up Open-Source Possibilities for the Future

What is RISC-V? The basics of RISC-V. Applications and uses of RISC-V. RISC-V is described as an open standard instruction set architecture (ISA) that's based on the reduced instruction set computer ...